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Electronics and Embedded Systems Cluster

Electronics and Embedded Systems Cluster

The main focus of this research cluster is to explore customized hardware, software and co-design solutions for embedded systems. The development of high speed programmable DSP chips as well as re-configurable and programmable hardware has made it possible that many operations of conventional high performance and low power applications can be implemented in the form of re-usable semiconductor IP-cores and associated Software Development Kit (SDK). This not only reduces design time and cost by orders of magnitude but enables manufacturers to maintain a balanced inventory. Important contemporary applications in which these modern system design techniques are being investigated include (but not limited to) Software Defined Radio (SDR) and Wireless Sensor Network (WSN).

Another research activity includes hardware-based algorithm acceleration in both compute-intensive systems, such as multimedia (image/video) applications, as well as control-intensive systems, like device drivers and communication protocol stack.  In this approach, instead of running the application tasks on a programmable processor, an application specific micro-architecture is generated either by manually written or automatically generated Hardware Description Language (HDL) codes. Such approach results in achieving energy-efficient designs for modern System-on-Chip (SoC) applications.

The EESL team is also working on the development of Electronic Design Automation (EDA) tools. The EDA tools such as Design-flows for high level synthesis (HLS) help the designers in a faster and easier implementations as they can directly code in a higher programming language like C, C++, SystemC or Matlab instead of going to a low-level and trickier programming in VHDL or Verilog HDL. We are working on developing HLS design-flows are various target platforms such as application specific integrated circuits (ASICs), FPGAs and coarse-grained reconfigurable architectures (CGRAs). The tools are being designed in collaboration with INRIA Rennes (France), LIP-6 Paris (France) and COMSATS IIT Lahore, Pakistan.

Another active research thread is in the domain of water telemetry and management solutions. We are collaborating with HS-Offenburg Germany through DAAD funding for the development of an automated test-bed for spatially distributed wireless real time monitoring system of large scale waterways. Water level monitoring helps to increase the efficiency of water distribution and management. In Pakistan, the world’s largest irrigation system which covers 90,000 km of channels needs to be monitored and managed on different levels. The irrigated agriculture of Pakistan mainly depends on Indus River System and its tributaries. The need for improvement in efficiency and productivity of the irrigation water has become one of key issues for the irrigation and the agriculture sector. Monitoring of the waterways is a key element for efficient and fair water distribution as well. In this project, we are developing specific prototypes in hardware and software for energy efficient wireless sensor nodes. We are also working on the development of energy-efficient routing and MAC protocols for large spatially distributed WSNs as well.

Former Affiliates/Alumni:

  • Dr. Faheem Sheikh (Senior Technical Lead at Mentor Graphics)
  • Dr. Muhammad Bilal (Research Fellow in KSA)
  • Mr. Shahrukh Athar (PhD student at University of Waterloo, Canada)
  • Mr. Zahaib Akhtar (PhD student at University of Southern California (USC), USA)
  • Mr. Usama Awais (PhD student at University of Texas, Dallas, USA)
  • Ms. Aqsa Naeem (PhD student at LUMS, Pakistan)
  • Mr. Muhammad Mushahar (MS student at University of Manchester, UK)
  • Mr. Azam Shahani (Co-founded Techjango, Designer of Xbox Laptop and 3D Printer)
  • Mr. Waqar Ali (Design Engineer at Mentor Graphics)
  • Mr. Mazhar Ahmad (Embedded Software and System Developer at Powersoft19.com) 
  • Mr. Usama Masood (Technical Lead at Mentor Graphics)
  • Mr. Usman Iftikhar (Technical Lead at Mentor Graphics)

Research Assistants: Mohammad Hassan Shahid, Mishal Rizwan, Muhammad Bilal Siddiqui, Umer Gul, Muhammad Irfan
Graduate (MS Thesis) Students: Muhammad Irfan, Umair Khan, Adnan Rauf, Muhammad Ali  
Focal Research Areas:

    • Digital System Design using FPGA
    • VLSI Design
    • Design Automation of Electronic Systems
    • CAD Flow for Reconfigurable Architectures
    • Embedded System Design using RTOS
    • Real-Time Control and Instrumentation

Active Research Grants:

  • Title: Automated Test-bed for Spatially Distributed Wireless Real Time Monitoring System of Large Scale Waterways

Funding Agency: German Academic Exchange Service (DAAD), Germany
Involved Faculty: Dr. Shahid Masud (PI), Dr. Muhammad Adeel Pasha (Co-PI)

  • Title: Framework for High Level Power Estimation of Embedded Soft Core Processors

Funding Agency: Higher Education Commission (HEC), Pakistan 
Involved Faculty: Dr. Muhammad Adeel Pasha (PI), Dr. Shahid Masud (Co-PI)

  • Title: LUMS Start Up Grant

Funding Agency: LUMS, Pakistan
Involved Faculty: Dr. Muhammad Adeel Pasha

Research Collaborations:

  • Offenburg University of Applied Sciences
  • IRISA/INRIA Rennes France
  • LIP6 Paris-VI, Paris France
  • COMSATS IIT Lahore

Research Publications

  • A Novel Split Radix Fast Fourier Transform Design for an Adaptive and Scalable Implementation
    Adnan Rauf, Muhammad Adeel Pasha, Shahid Masud
    3rd IEEE IDAACS Symposium on Wireless Systems 2016 (accepted)
  • LED-based Visible Light Communication System for Low Data Rate Point-and-Grab Applications
    Bilal Siddiqui, Muhammad Adeel Pasha, Aqsa Naeem, Naveed Ul Hassan, Tariq Jadoon
    13th International Conference on Frontiers of Information Technology (FIT'15) Dec 2015
  • Improved Low Power Scheduler For OSS-7: An Open Source DASH7 stack
    Mohammad Hassan Shahid, Shahid Masud
    Proceedings of IEEE ICECS Conference, Dec 6 – 9, 2015, Cairo, Egypt
  • Pipelined Phase Accumulator using Han Carlson Adders and reduced pre-skewing Flip-flops for DDFS
    Usama Awais, Salman Nazir, Shahid Masud
    12th International SoC Design Conference, Nov 2 – 5, 2015, Gyeongju, South Korea
  • Clean Consumer Energy Technologies in Developing Countries: A Case Study of Energy Efficient Lights in Pakistan
    Muhammad Muneeb Ur Rehman, Muhammad Adeel Pasha, Naveed Ul Hassan
    2015 IEEE International Conference on Smart Grid and Clean Energy Technologies (ICSGCE'15), Offenburg, Germany, Oct. 2015
  • Indoor Positioning Using Visible LED Lights: A Survey
    Naveed Ul Hassan, Aqsa Naeem, Muhammad Adeel Pasha, Tariq Jadoon, Chau Yuen
    ACM Computing Surveys (CSUR), 48(2), 20. 2015
  • I-LEACH: Energy Efficient Routing Protocol for Monitoring of the Irrigation Canals
    Muhammad Adeel Pasha, Jahangir Hassan Khan, Shahid Masud
    Simulation: Transactions of the Society for Modeling and Simulation International, Vol 91, Issue 8, pp. 750-764, Aug-2015
  • I-LEACH: energy-efficient routing protocol for monitoring of irrigation canals
    Muhammad Adeel Pasha, Jahangir Hassan Khan, Shahid Masud
    SIMULATION Journal, Volume 91, Issue 8, Pages 750-764, SAGE Publishers
  • A Design-flow for High-Level Synthesis and Resource Estimation of Reconfigurable Architectures 
    Muhammad Adeel Pasha, Bilal Siddiqui, Umer Farooq 
    The 10th IEEE Conference on Design and Technology of Integrated Systems in Nanoscale Era 2015 (DTIS'15), pp.1-6, Naples, Italy, Apr-2015
  • Indoor positioning system designs using visible LED lights: performance comparison of TDM and FDM protocols
    Umar Nadeem ; Naveed Ul Hassan ; Muhammad Adeel Pasha and Chau Yuen
    Electronics Letters, Volume 51, Issue 1, 08 January 2015, p. 72 - 74
  • System-Level Synthesis of Ultra Low Power Sensor Node Controllers
    Muhammad Adeel Pasha
    Invited Talk at First International Workshop on Water Monitoring and Management, Offenburg, Germany, 2014
  • A Highly Accurate 3-D Wireless Indoor Positioning System using Visible LEDs
    Umar Nadeem, Naveed Ul Hassan, Muhammad Adeel Pasha and Chau Yuen, 
    Electronics Letters, Volume 50, issue 11, May 2014, p. 828 - 830
  • System-level Power Estimation of Embedded Processors
    Muhammad Mushahar, Muhammad Adeel Pasha, Shahid Masud
    German Embedded Systems Symposium, Munich, Germany, 2014
  • Impact of Scheduling Flexibility on Demand Profile Flatness and User Inconvenience in Residential Smart Grid System
    Naveed Ul Hassan, Muhammad Adeel Pasha, Chau Yuen, Shisheng Huang and Xiumin Wang
    Energies, Vol: 6, Issue: 12 , Pages: 6608-6635; December 2013; doi:10.3390/en6126608
  • Component-Level Datapath Merging in System-Level Design of Wireless Sensor Node Controllers for FPGA-based Implementations
    Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys
    EuroMicro Digital System Design Conference (DSD'13), 2013
  • Architectures de controleurs ultra-faible consommation pour noeuds de reseau de capteurs sans fil 
    Olivier Sentieys, Muhammad Adeel Pasha, and Steven Derrien 
    GRESTI'13: 24th Bi-annual Symposium on Image and Signal Processing, 2013
  • Design and implementation of an ML decoder for tail-biting convolutional codes
    Farhan Bin Khalid, Shahid Masud, Momin Uppal
    Proceedings of 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China
  • “Modeling and analysis of transistor mismatch due to variability in short channel effect induced by random dopant fluctuation,”
    N. Z. Butt, and J.B. Johnson,
    IEEE Electron Device Letters, Vol. 33, Issue 8, 2013.
  • FPGA Design for Statistics-Inspired Approximate Sum-of-Squared-Error Computation in Multimedia Applications
    Muhammad Bilal, Shahid Masud and Shahrukh Athar
    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.59, No.8, PP. 506-510, Aug. 2012
  • Efficient computation of correlation coefficient using negative reference in template matching applications
    M. Bilal, S. Masud
    IET Image Processing, Volume: 6 , Issue: 2 / 2012
  • Teaching and Research in FPGA based DSP using Xilinx System Generator
    S. Athar, M.A. Siddiqui, S. Masud
    Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP’12)
  • Teaching and Research in FPGA based Digital Signal Processing using Xilinx System Generator
    Shahrukh Athar, Muhammad Ali Siddiqi and Shahid Masud
    2012 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), PP. 2765-2768, March 25-30 2012, Kyoto Japan.
  • System-Level Synthesis for Wireless Sensor Node Controllers: A Complete Design Flow
    Muhammad Adeel Pasha, Steven Derrien, and Olivier Sentieys
    ACM Transactions on Design Automation of Electronic Systems (TODAES) Volume 17, Issue 1, Article 2 (January 2012), 24 pages. DOI=10.1145/2071356.2071358
  • S2S4HLS and LoMiTa flows in GeCoS
    Antoine Morvan, Ludovic L'Hours, Antoine Floch, Kevin Martin, Muhammad Adeel Pasha, Amit Kumar, Maxime Naullet, Steven Derrien
    University Booth at DATE'11, Grenoble, France
  • Energy Efficient Lower Layers Techniques for WSNs
    Olivier Sentieys, Olivier Berder, Duc Nguyen, Vinh Tran, Muhammad Adeel Pasha, Steven Derrien, Vivek T.D., Mahtab Alam, Arnaud Carer, Romain Fontaine
    Tutorial Session in 2nd Workshop on Ultra-Low Power Sensor Networks (WUPS'11)
  • “A 0.039um2 High Performance eDRAM Cell based on 32nm High-K/Metal SOI Technology”
    N. Z Butt, K. Mcstay, A. Cestero, H. Ho, W. Kong, S. Fang, R. Krishnan, B. Khan, A. Tessier, W. Davies, S. Lee, Y. Zhang, J. Johnson, S. Rombawa, R. Takalkar, A. Blauberg, K. V. Hawkins, J. Liu, S. Rosenblatt, P. Goyal, S. Gupta, J. Ervin, Z. Li, S. Galis, J. Barth, M. Yin. T. Weaver, J. H. Li, S. Narasimha, P. Parries, W. K. Henson, N. Robson, T. Kirihata, M. Chudzik, E. Maciejewski, P. Agnello, S. Stiffler, and S.S. Iyer,
    IEEE Electron Devices Meeting (IEDM) , San Francisco, CA, Dec 2010.
  • “TCAD in eDRAM Development”,
    Y. Zhang, P. Parries, C. Pei, G. Wang, K. Mcstay, N. Z. Butt, J. Johnson, S. Furkay,
    IBM Semiconductor Technology Symposium, York Town Heights Dec. 2010.
  • System-Level Synthesis of Ultra Low-Power Wireless Sensor Network Node Controllers: A Complete Design-Flow
    Muhammad Adeel Pasha
    Ph.D. Dissertation, University of Rennes I, Rennes, France, December 2010
  • Design and FPGA Implementation of a 2nd Order Adaptive Delta Sigma Modulator with One Bit Quantization
    Shahrukh Athar, Muhammad Ali Siddiqi and Shahid Masud
    2010 International Conference on Field Programmable Logic and Applications (FPL), PP. 388-393, Aug. 31 2010-Sept. 2 2010, Milan Italy
  • Design and FPGA Implementation of a 2nd order Adaptive Delta Sigma Modulator with One Bit Quantization
    S. Athar, M.A. Siddiqi, S. Masud
    Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), Milan, Italy, Aug 2010
  • A Complete Design-Flow for the Generation of Ultra Low-Power WSN Node Architectures Based on Micro-Tasking
    Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys
    Proceedings of the 47th ACM/IEEE Design Automation Conference (DAC'10), Anaheim CA USA, June 2010
  • Survey of Dirac: A Wavelet Based Video Codec for Multiparty Video Conferencing and Broadcasting Intelligent Video Event Analysis and Understanding
    Ahtsham Ali, Nadeem A. Khan, Shahid Masud and Syed Farooq Ali
    Studies in Computational Intelligence, 2010, Volume 332/2010, Springer, pp 211-247
  • FIR Filter Implementation through Speculative Sub-Expression Sharing in Image Data
    M. Bilal, S. Masud
    International Conference on Acoustics Speech and Signal Processing, Dallas, Texas, USA, Mar 14 – 19, 2010, pp 1582-1585
  • Sample Rate Conversion Filter Design for Multi-standard Software Radios
    F. Sheikh, S. Masud
    Digital Signal Processing Journal, Elsevier, Vol 20, Issue 1, Jan 2010, pp 3 – 12
  • “Scaling Deep Trench Based eDRAM on SOI to 32nm and Beyond”,
    Wang, G. Anand, D. Butt, N. Z. Cestero, A. Chudzik, M. Ervin, J. Fang, S. Freeman, G. Ho, H. Khan, B. Kim, B. Kong, W. Krishnan, R. Krishnan, S. Kwon, O. Liu, J. McStay, K. Nelson, E. Nummy, K. Parries, P. Sim, J. Takalkar, R. Tessier, A. Todi, R.M. Malik, R. Stiffler, S. Iyer, S.S.,
    IEEE Electron Devices Meeting (IEDM), Dec. 2009.
  • “32 nm eDRAM Array FET – Key Device Challenges & Solutions”,
    N. Z. Butt, K. Mcstay, Y. Zhang, J. Johnson, G. Wang, C. Pei, J. Ervin, A. Tessier, S. Fang, R. Takalkar, B. Kim, J. Liu, B. Khan, P. Parries, S. Narasimha, S. Stiffler, E. Maciejewski,
    IBM Semiconductor Technology Symposium, York Town Heights, Dec. 2009.
  • “Scaling Deep Trench Based eDRAM on SOI to 32nm and Beyond”,
    Wang, G. Anand, D. Butt, N. Z. Cestero, A. Chudzik, M. Ervin, J. Fang, S. Freeman, G. Ho, H. Khan, B. Kim, B. Kong, W. Krishnan, R. Krishnan, S. Kwon, O. Liu, J. McStay, K. Nelson, E. Nummy, K. Parries, P. Sim, J. Takalkar, R. Tessier, A. Todi, R.M. Malik, R. Stiffler, S. Iyer, S.S.,
    IBM Semiconductor Technology Symposium, York Town Heights, Dec. 2009.
  • “Feasibility Study of 22nm PDSOI eDRAM Array FET Device”,
    Y. Zhang, P. C. Parries, J. B. Johnson, C. Pei, G. Wang, K. Mcstay, N. Z. Butt, J. Ervin, G. G. Freeman, S. S. Furkay,
    IBM Semiconductor Technology Symposium, York Town Heights, NY, Dec. 2009.
  • Memory and Architectural Optimizations in Soft Video Encoders
    F. Nasim. S. Masud, N. Khan
    Journal of Real-time Image Processing, Springer, Vol. 4, No. 2, pp 147 – 154, June 2009
  • Superscalar Architecture Design for High Performance DSP Operations
    F. Sheikh, S. Masud, R. Ahmed
    Microprocessors and Microsystems, Elsevier Publishers, Vol 33, Issue 2, Mar 2009, pp 154 – 160
  • Harmonic Power Detection in Wideband Cognitive Radios
    F. Sheikh, S. Masud, B. Bing
    IET Signal Processing Journal, Vol 3, No. 1, pp 40 – 50, January 2009
  • Memory Efficient VLSI Architecture for QCIF to VGA Resolution Conversion
    A. Khan, S. Masud
    Springer Lecture Notes of 3rd Pacific Rim Symposium on Image and Video Technology (PSIVT’09), Jan 2009, Japan, pp 829 – 838
  • “Single Event Upsets in Floating Gate Memory Cells”,
    N. Z. Butt, and M. A. Alam,
    IEEE International Reliability Physics Symposium (IRPS), Phoenix, Arizona, April 2008.
  • "Soft Error Trends and New Physical Model for Ionizing Dose Effects in Double Gate Z-RAM Cell,"
    N. Z. Butt, P. D. Yoder, and M. A. Alam,
    IEEE Tran. Nucl. Sci., vol. 54, no. 6, Dec. 2007.
  • XML-Based Policy Engineering Framework for Heterogeneous Network Management
    Samuel, Arjmand, Baqai, Shahab, and Ghafoor, Arif
    In the 10th Asia-Pacific Network Operations and Management Symposium (APNOMS 2007), Sapporo, Japan
  • “Scaling limits of Double Gate and Surround Gate Z-RAM Cells,”
    N. Z. Butt, and M. Alam,
    IEEE Tran. Electron Device, vol. 54, no. 9, Sep 2007
  • “Radiation Performance of Capacitor-less Floating Body DRAM”,
    N. Z. Butt, P. D. Yoder, and M. A. Alam,
    IEEE Nuclear and Space Radiation Effects Conference (NSREC), Honolulu, Hawaii, July 2007.
  • Efficient Sample Rate Conversion for Multi-standard Software Defined Radios
    F. Sheikh, S. Masud
    Proceedings of the International Conference on Acoustics Speech and Signal Processing (ICASSP’07), Hawaii, USA {*Best Student Paper Contest Finalist}
  • Arabic Phoneme Identification Using Conventional and Concurrent Neural Networks in Non Native Speakers
    M.M. Awais, S. Masud, J. Akhtar, S. Shamail
    Advanced Intelligent Computing Theories and Applications with Aspects of Theoretical and Methodological Issues, Springer Verlag, pp 897 – 905, 2007
  • "Low Frequency Noise Statistics for the Breakdown Characterization of Ultrathin Gate Oxides,"
    N. Z. Butt, A. M. Chang, H. Raza, R. Bashir, J. Liu, and D. L. Kwong,
    App. Phys. Lett., 88, 112901, 2006.
  • A Variable Block Size Motion Estimation Algorithm for Real-time H.264 Video Encoding
    N.A. Khan, S. Masud, A. Ahmad
    Signal Processing: Image Communication Journal, Elsevier Publishers ISSN: 0923-5965, Vol 21, Issue 4, pp 306 – 315, April 2006
  • On Vowels Segmentation and Identification Using Formant Transitions in Continuous Recitation of Quranic Arabic
    H. R. Iqbal , M. M. Awais, S. Masud, S. Shamail
    New Challenges in Applied Intelligence Technologies, Springer-Verlag 2008, ISBN: 978-3-540-79354-0
  • “Scaling Limits of Capacitor-less Double Gate DRAM Cell”,
    N. Z. Butt, and M. A. Alam,
    IEEE International Conference on Simulation of Semiconductor Processes and Devices ( SISPAD), Monterey, CA 2006.
  • Automatic Arabic Speech Recognition System
    Anwar, M.J., Awais, M.M., Masud, S., and Shamail, S.
    International Journal of Information Technology, Singapore, vol. 12, No. 6, pp 102-111, 2006. Also published in conference proceedings, International Conference on Intelligent Computing, Hefei, China, Aug 23 - 26, 2005, pp 453 – 462
  • Implementation of Wavelet Functions in Hardware
    S. Masud, J. McCanny
    US patents office, Dec 13, 2000 (Granted 6,785,700, August 31, 2004)
  • A Hybrid Multi-Layered Speaker Independent Arabic Phoneme Identification System
    M.M. Awais, S. Masud, S., Shamail, J. Akhtar
    Fifth International Conference on Intelligent Data Engineering and Automated Learning, Aug 25-27, 2004, pp 416-423 (IDEAL) and Lecture Notes in Computer Science (no. 3177 / 2004) by Springer-Verlag, ISBN 3-540-22881-0
  • Reusable Silicon IP Cores for Discrete Wavelet Transform Applications
    S. Masud, J.V. McCanny
    IEEE Transactions on Circuits and Systems I: Regular Papers, Vol 51, Issue 6, June 2004, pp 1114 - 1124
  • Selection of Variable Block Sizes in H.264
    A. Ahmad, N. Khan, S. Masud, M.A. Maud
    International Conference on Acoustics Speech and Signal Processing (ICASSP’04), Montreal Canada, May 2004
  • “Noise Spectroscopy for the Characterization and Investigation of Ultra-Thin Gate Dielectrics”,
    N. Z. Butt, A. M. Chang, H. Raza, R. Bashir, and D. L. Kwong,
    Annual APS March Meeting, Montreal, Canada, 2004.
  • Efficient Block Size Selection in H.264 Video Coding Standard
    A. Ahmad, N. Khan, S. Masud
    IEE Electronics Letters, Vol 40, No. 1, Jan 2004, pp 19-21
  • Architecture Component and Method for Performing Discrete Wavelet Transforms
    J. McCanny, P. McCanny, S. Masud
    EU Patent Application no. 20020020945.8, Sep 19, 2002, EP1298932, Publication date: 02 April, 2003
  • Semiconductor IP Accelerator Cores for Ultra Low Power MPEG-4 Video Decode in System-on-Silicon
    J. Dunlop, A. Simpson, S. Masud, M. Wylie, J. Cochrane, R. Kinkead
    Proceedings of the International Conference on Acoustics Speech and Signal Processing (ICASSP’03), April 2003, Hong Kong, pp 681-684
  • Architecture for 2-D Wavelet Transforms
    S. Masud. J. McCanny
    Number 09/957,292 pending in the US patents office, Sep 19, 2001, (Pre-grant no. 20030055856, March 20, 2003)
  • “Noise Spectroscopy for the Investigation and Characterization of Ultra-Thin Gate Dielectrics,”
    N. Z. Butt, H. Raza, R. Bashir, and A. M. Chang,
    Annual APS March Meeting, Austin, Texas, March, 2003.
  • Design and Implementation of the Symmetrically Extended 2-D Wavelet Transform
    P. McCanny, S. Masud, J.V. McCanny
    Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP’02), 2002, USA, pp 3108-3111
  • Design of Silicon IP Cores for Biorthogonal Wavelet Transforms
    S. Masud, J.V. McCanny
    Journal of VLSI Signal Processing, Kluwer Academic Publishers (now Springer), Vol 29, Nov 2001, pp 179-196
  • An Efficient Architecture for the 2-D Biorthogonal Discrete Wavelet Transform
    P. McCanny, S. Masud, J. McCanny
    Proceedings of the IEEE International Conference on Image Processing (ICIP’01), Oct 2001, Greece, pp 314-317
  • Rapid Design of Biorthogonal Wavelet Transforms
    S. Masud, J.V. McCanny,
    IEE Proceedings on Circuits Devices and Systems, Vol 147, No 5, Oct 2000, pp 293-296
  • Wavelet Packet Transforms for System-on-chip Applications
    S. Masud and J.V. McCanny
    Proceedings of the 25th IEEE International Conference on Acoustics Speech and Signal Processing (ICASSP’00), Jun 2000, Turkey, pp 3287-3290
  • Rapid Design of Discrete Orthonormal Wavelet Transforms using Silicon IP Components
    S. Masud, J.V. McCanny
    Proceedings of the 24th IEEE International Conference on Acoustics Speech and Signal Processing (ICASSP’99), Mar 1999, USA, pp 2167-2170
  • Chip Design for High Performance DSP
    R. Woods, S. Masud,
    IEE Electronics and Communication Engineering Journal, Aug 1998, Vol 10, No 4, pp 191-200
  • Finding a Suitable Wavelet for Image Compression Applications
    S. Masud, J. V. McCanny
    Proceedings of the 23rd IEEE International Conference on Acoustics Speech and Signal Processing (ICASSP’98), May 1998, Seattle, USA, pp 2581-2584